TITLE: HPEC-SI Joint Development & Prototype
Working Group Meeting
TOPIC: VSIPL++ & Parallel VSIPL Technical Issues
-Parallel Mapping
-Example Applications
DATE: Wednesday 22 August 2001 (all day)
Thursday 23 August 2001 (morning)
LOCATION: MIT Lincoln Laboratory, Lexington, MA
Room S2-600
For directions see http://www.ll.mit.edu/about/visitor.html
ORGANIZERS:
HPEC-SI Development Working Group Co-Chairs
Mark Richards (mark.richards@gtri.gatech.edu)
James Lebak (jlebak@ll.mit.edu)
HPEC-SI Prototypes Working Group Co-Chairs
Bob Bond (rbond@ll.mit.edu)
HPEC-SI Advisory Board
Jeremy Kepner (kepner@ll.mit.edu)
ATTENDANCE:
Attendance is open to all U.S. Citizens.
If you plan on attending please send e-mail to:
kepner@ll.mit.edu
CLEARANCE:
This meeting is UNCLASSIFIED.
However, if you have a clearance we would appreciate having
you send it. E-mail kepner@ll.mit.edu
for details.
Presentations
-
Review of previous work to date
-
Program status (Ed Baranoski - MIT/LL)
- MS
PPT | Adobe
PDF
-
Meeting 1 "Issues" (Jeremy Kepner - MIT/LL)
- MS
PPT | Adobe
PDF
-
Meeting 2 "Memory Abstraction" (Mark Richards/Dan Campbell - GTRI)
- MS
PPT | Adobe
PDF
-
Other data distributions (Tony Skjellum - MPI)
- MS PPT | Adobe PDF
-
Parallel Mapping of Data, Task, and Pipeline parallelism
-
Prototype Application descriptions
-
Filtering / MultiStage / Image Detect (James Lebak - MIT/LL)
-
VSIPL Implementation of the RT_ STAP Benchmark (Brian Sroka - Mitre)
- MS PPT
| Adobe PDF
-
Image Processing (Murali Beddhu - MPI)
- MS
PPT | Adobe
PDF
 |