High Performance Embedded Computing
Software Initiative (HPEC-SI)

TITLE: HPEC-SI Development Working Group
TOPICS: VSIPL++ v0.1 draft code and doc review
                Synthesis of Task/Pipeline Parallel Requirements

DATE:  Sep 27, 2002

LOCATION: MIT Lincoln Laboratory, Lexington, MA
          Room S2-616 
          For directions see 
         http://www.ll.mit.edu/about/visitor.html

Minutes (Lebak/MIT)

ORGANIZERS:

  HPEC-SI Development Working Group Co-Chairs
      Mark Richards (mark.richards@ece.gatech.edu) 
      James Lebak (jlebak@ll.mit.edu) 

  HPEC-SI Prototypes Working Group Co-Chairs
      Bob Bond (rbond@ll.mit.edu) 
      Henk Spaanenburg (hspaanenburg@mc.com>) 

  HPEC-SI Advisory Board
      Jeremy Kepner (kepner@ll.mit.edu) 

ATTENDANCE:

Attendance is open to all U.S. Citizens.
If you plan on attending (in person or telecon) please send e-mail to: jlebak@ll.mit.edu

CLEARANCE:
  This meeting is UNCLASSIFIED. 
  However, if you have a clearance we would appreciate having 
  you send it to: 

              MIT Lincoln Laboratory 
              244 Wood Street 
              Lexington, MA  02420 
              Attn:  Roslyn Wesley 
              (781) 981-2377--Phone 
              (781) 981-5588--Fax 

The main topics for the meeting will be:
(1) Development Working Group (2002 Sep 27)
     Review of VSIPL++ v0.1 draft code and document (Jeff/Mark CodeSourcery)
     see: http://www.hpec-si.org/private/software1.html

(2) Applied Research Working Group (2002 Sep 27)
     Review synthesis of the Task/Pipeline parallel constructs
     (Dan Campbell GTRI & Murali Beddhu MSTI)

AGENDA (Preliminary):

Friday, Sep 27, 2002
  (DEVELOPMENT WORKING GROUP)
  09:00-09:30                     BREAKFAST
  09:30-10:00                     HPEC-SI Overview (Kepner MIT-LL)
  10:00-12:00                     VSIPL++ v0.1 draft doc and code (CodeSourcery)
........................................... PPT / PDF
..........................................Expression Templates (CodeSourcery)
............................................PDF
........................................ .Sample VSIPL ++ Programs (GTRI)
............................................PPT / PDF
  12:00-01:00                     LUNCH
  01:00-03:00                     DISCUSSION
  03:30-04:00                     BREAK
  (APPLIED RESEARCH WORKING GROUP)
  04:00-05:00                     Synthesis of Task/Pipeline parallel approaches (GTRI & MSTI)
........................................... PPT / PDF
  05:00-05:30                     Organization and Planning
  07:00-                             Dinner TBD