High Performance Embedded Computing
Software Initiative (HPEC-SI)

TITLE: HPEC-SI Development Working Group (2003 Mar 12 Wed)
HPEC-SI Prototypes Working Group (2002 Mar 13 Thur)

TOPICS: VSIPL++ v0.5 Specification review
Fault Tolerance

LOCATION: MIT Lincoln Laboratory, Lexington, MA
Room S2-616
For directions see
http://www.ll.mit.edu/about/visitor.html

ORGANIZERS:

HPEC-SI Development Working Group Co-Chairs
Mark Richards (mark.richards@gtri.gatech.edu)
James Lebak (jlebak@ll.mit.edu)

HPEC-SI Prototypes Working Group Co-Chairs
Bob Bond (rbond@ll.mit.edu)
Ken Flowers (kflowers@mc.com)

HPEC-SI Advisory Board
Jeremy Kepner (kepner@ll.mit.edu)

ATTENDANCE:
Attendance is open to all U.S. Citizens.
If you plan on attending (in person or telecon) please send e-mail to:
kepner@ll.mit.edu

AGENDA : PPT / PDF

Minutes

Wednesday, Mar 12, 2003
(VSIPL FORUM and DEVELOPMENT WORKING GROUP)

09:00-09:30 BREAKFAST
09:30-10:00 HPEC-SI Overview (Kepner MIT-LL)
...............PPT / PDF

10:00-10:30 Lessons Learned from the CIP (Sroka MITRE)
...............PPT / PDF / Comments
10:30-12:00 VSIPL++ Specification Review
.............-Status of VSIPL++ compilation (Leimbach MSTI)
.............-Templated parameters (Lebak LL)
...............PPT / PDF
.............-Block proposal (Campbell GTRI)
...............PPT / PDF
12:00-01:00 LUNCH
01:00-03:00 Parallel VSIPL++ v0.1 specification (Oldham CodeSourcery)

...............PPT / PDF

03:00-03:30 BREAK
03:30-04:00 VSIPL++ Applications (Bergmann AFRL)
04:00-05:00 Organization and Planning
07:00- Dinner TBD

Thursday, Mar 13, 2003
(APPLIED RESEARCH WORKING GROUP)

09:00-09:30 BREAKFAST
09:30-10:00 Early thoughts on task/pipeline proposals (Daly MIT-LL)
10:00-12:00 DoD Fault Tolerance Practice
..............-Rick Pancoast / Lockheed Martin
..............-FT CORBA
12:00-01:00 LUNCH